From 922d7dd4a46f21892eaed7bbced65cca38d015cd Mon Sep 17 00:00:00 2001 From: Sergey Fedorov Date: Sat, 22 Nov 2025 20:37:12 +0700 Subject: [PATCH 2/7] AArch64: add apple-a14 as a CPU Cherry-picks from https://github.com/llvm/llvm-project/commit/6259fbd8b69531133d24b5367a6a2cd9b183ce48 --- .../llvm/Support/AArch64TargetParser.def | 2 ++ llvm/lib/Target/AArch64/AArch64.td | 33 +++++++++++++++++++ llvm/lib/Target/AArch64/AArch64Subtarget.cpp | 1 + llvm/lib/Target/AArch64/AArch64Subtarget.h | 1 + 4 files changed, 37 insertions(+) diff --git llvm/include/llvm/Support/AArch64TargetParser.def llvm/include/llvm/Support/AArch64TargetParser.def index 4c5075fde2f..b4fe937e9b6 100644 --- llvm/include/llvm/Support/AArch64TargetParser.def +++ llvm/include/llvm/Support/AArch64TargetParser.def @@ -99,6 +99,8 @@ AARCH64_CPU_NAME("apple-a12", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false, (AArch64::AEK_FP16)) AARCH64_CPU_NAME("apple-a13", ARMV8_4A, FK_CRYPTO_NEON_FP_ARMV8, false, (AArch64::AEK_FP16 | AArch64::AEK_FP16FML)) +AARCH64_CPU_NAME("apple-a14", ARMV8_5A, FK_CRYPTO_NEON_FP_ARMV8, false, + (AArch64::AEK_FP16 | AArch64::AEK_FP16FML)) AARCH64_CPU_NAME("apple-s4", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false, (AArch64::AEK_FP16)) AARCH64_CPU_NAME("apple-s5", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false, diff --git llvm/lib/Target/AArch64/AArch64.td llvm/lib/Target/AArch64/AArch64.td index 4f944c9f251..7a69ccad54f 100644 --- llvm/lib/Target/AArch64/AArch64.td +++ llvm/lib/Target/AArch64/AArch64.td @@ -427,6 +427,38 @@ def ProcAppleA13 : SubtargetFeature<"apple-a13", "ARMProcFamily", "AppleA13", HasV8_4aOps ]>; +def ProcAppleA14 : SubtargetFeature<"apple-a14", "ARMProcFamily", "AppleA14", + "Apple A14", [ + FeatureAggressiveFMA, + FeatureAlternateSExtLoadCVTF32Pattern, + FeatureAltFPCmp, + FeatureArithmeticBccFusion, + FeatureArithmeticCbzFusion, + FeatureCrypto, + FeatureDisableLatencySchedHeuristic, + FeatureFPARMv8, + FeatureFRInt3264, + FeatureFuseAddress, + FeatureFuseAES, + FeatureFuseArithmeticLogic, + FeatureFuseCCSelect, + FeatureFuseCryptoEOR, + FeatureFuseLiterals, + FeatureNEON, + FeaturePerfMon, + FeatureSpecRestrict, + FeatureSSBS, + FeatureSB, + FeaturePredRes, + FeatureCacheDeepPersist, + FeatureZCRegMove, + FeatureZCZeroing, + FeatureFullFP16, + FeatureFP16FML, + FeatureSHA3, + HasV8_4aOps + ]>; + def ProcExynosM1 : SubtargetFeature<"exynosm1", "ARMProcFamily", "ExynosM1", "Samsung Exynos-M1 processors", [FeatureSlowPaired128, @@ -617,6 +649,7 @@ def : ProcessorModel<"apple-a10", CycloneModel, [ProcAppleA10]>; def : ProcessorModel<"apple-a11", CycloneModel, [ProcAppleA11]>; def : ProcessorModel<"apple-a12", CycloneModel, [ProcAppleA12]>; def : ProcessorModel<"apple-a13", CycloneModel, [ProcAppleA13]>; +def : ProcessorModel<"apple-a14", CycloneModel, [ProcAppleA14]>; // watch CPUs. def : ProcessorModel<"apple-s4", CycloneModel, [ProcAppleA12]>; diff --git llvm/lib/Target/AArch64/AArch64Subtarget.cpp llvm/lib/Target/AArch64/AArch64Subtarget.cpp index 57d58882cd2..761e5320811 100644 --- llvm/lib/Target/AArch64/AArch64Subtarget.cpp +++ llvm/lib/Target/AArch64/AArch64Subtarget.cpp @@ -72,6 +72,7 @@ void AArch64Subtarget::initializeProperties() { case AppleA11: case AppleA12: case AppleA13: + case AppleA14: CacheLineSize = 64; PrefetchDistance = 280; MinPrefetchStride = 2048; diff --git llvm/lib/Target/AArch64/AArch64Subtarget.h llvm/lib/Target/AArch64/AArch64Subtarget.h index 64095c8860f..116096c3b00 100644 --- llvm/lib/Target/AArch64/AArch64Subtarget.h +++ llvm/lib/Target/AArch64/AArch64Subtarget.h @@ -44,6 +44,7 @@ public: AppleA11, AppleA12, AppleA13, + AppleA14, CortexA35, CortexA53, CortexA55,