diff --git a/vpx_dsp/ppc/vpx_idct_altivec.c b/vpx_dsp/ppc/vpx_idct_altivec.c index c1e633971..4f7a0fcee 100644 --- a/vpx_dsp/ppc/vpx_idct_altivec.c +++ b/vpx_dsp/ppc/vpx_idct_altivec.c @@ -77,7 +77,7 @@ vector unsigned char merge64_lvec ALIGN16 = { // DCT utility function to splat an arbitrary signed short. Can work // for other unit sizes. -vector signed short ss_splat(signed short *what) { +static vector signed short ss_splat(signed short *what) { vector signed short result = vec_ld(0, what); vector signed short temp = vec_ld(sizeof(*what) - 1, what); vector unsigned char mover = vec_lvsl(0, what); @@ -88,7 +88,7 @@ vector signed short ss_splat(signed short *what) { void vpx_idct4x4_1_add_altivec(const tran_low_t *input, uint8_t *dest, int stride) { vector signed short dc_value, i0, i1, i2, i3; vector unsigned char p0, p1, p2, p3; - vector unsigned char zero = vec_splat_s8(0); + vector unsigned char zero = vec_splat_u8(0); vector unsigned int ltemp; int a; signed short a_s; @@ -101,16 +101,16 @@ void vpx_idct4x4_1_add_altivec(const tran_low_t *input, uint8_t *dest, int strid // I chose to interleave the vector calls to see if we can // get better parallelism rather than a macro like SSE2's. - _unaligned_load32(p0, (uint32_t *)(dest + 0 * stride)); + _unaligned_load32(p0, (unsigned char *)(dest + 0 * stride)); // SSE unpacklo(x,y) becomes vec_mergeh(y,x) i0 = (vector signed short)vec_mergeh(zero, p0); - _unaligned_load32(p1, (uint32_t *)(dest + 1 * stride)); + _unaligned_load32(p1, (unsigned char *)(dest + 1 * stride)); i0 = vec_add(i0, dc_value); i1 = (vector signed short)vec_mergeh(zero, p1); - _unaligned_load32(p2, (uint32_t *)(dest + 2 * stride)); + _unaligned_load32(p2, (unsigned char *)(dest + 2 * stride)); p0 = vec_packsu(i0, i0); i1 = vec_add(i1, dc_value); - _unaligned_load32(p3, (uint32_t *)(dest + 3 * stride)); + _unaligned_load32(p3, (unsigned char *)(dest + 3 * stride)); i2 = (vector signed short)vec_mergeh(zero, p2); p1 = vec_packsu(i1, i1); _unaligned_store32(p0, ltemp, (uint32_t *)(dest + 0 * stride)); @@ -125,9 +125,9 @@ void vpx_idct4x4_1_add_altivec(const tran_low_t *input, uint8_t *dest, int strid } void vpx_idct4x4_16_add_altivec(const tran_low_t *input, uint8_t *dest, int stride) { - vector unsigned char zero = vec_splat_s8(0); - vector unsigned char one = vec_splat_s8(1); - vector unsigned short four = vec_splat_s16(4); + vector unsigned char zero = vec_splat_u8(0); + vector unsigned char one = vec_splat_u8(1); + vector unsigned short four = vec_splat_u16(4); vector signed short eight = vec_splat_s16(8); vector signed short input0, input1, input2, input3; vector signed int wnput0, wnput1, wnput2, wnput3; @@ -142,8 +142,8 @@ void vpx_idct4x4_16_add_altivec(const tran_low_t *input, uint8_t *dest, int stri }; // The Intel intrinsics used imply the input is aligned. - input0 = vec_ld(0, (uint32_t *)input); - input2 = vec_ld(16, (uint32_t *)input); + input0 = vec_ld(0, (const signed short *)input); + input2 = vec_ld(16, (const signed short *)input); // ALL HAIL THE ALTIVEC PERMUTE UNIT! // SUCK IT, INTEL! @@ -242,12 +242,12 @@ void vpx_idct4x4_16_add_altivec(const tran_low_t *input, uint8_t *dest, int stri // This is kind of a bass-ackwards merged unaligned store, really. // // Get the destination values we're going to merge with. - _unaligned_load32(wnput0, (uint32_t *)dest); - _unaligned_load32(wnput1, (uint32_t *)(dest + stride)); + _unaligned_load32(wnput0, (signed int *)dest); + _unaligned_load32(wnput1, (signed int *)(dest + stride)); wnput0 = vec_mergeh(wnput0, wnput1); - _unaligned_load32(wnput2, (uint32_t *)(dest + stride + stride)); + _unaligned_load32(wnput2, (signed int *)(dest + stride + stride)); wnput0 = (vector signed int)vec_mergeh(zero, (vector unsigned char)wnput0); - _unaligned_load32(wnput3, (uint32_t *)(dest + stride + stride + stride)); + _unaligned_load32(wnput3, (signed int *)(dest + stride + stride + stride)); wnput2 = vec_mergeh(wnput3, wnput2); wnput2 = (vector signed int)vec_mergeh(zero, (vector unsigned char)wnput2); @@ -271,7 +271,7 @@ void vpx_idct4x4_16_add_altivec(const tran_low_t *input, uint8_t *dest, int stri void vpx_idct8x8_1_add_altivec(const tran_low_t *input, uint8_t *dest, int stride) { vector signed short dc_value, i0, i1, i2, i3, i4, i5, i6, i7; vector unsigned char p0, p1, p2, p3, p4, p5, p6, p7; - vector unsigned char zero = vec_splat_s8(0); + vector unsigned char zero = vec_splat_u8(0); vector unsigned int ltemp; int a; signed short a_s; @@ -290,15 +290,15 @@ void vpx_idct8x8_1_add_altivec(const tran_low_t *input, uint8_t *dest, int strid // XXX: Would we spend more time constructing the optimized vectors // to store than simply taking the hit for being unaligned? - _unaligned_load64(p0, (uint32_t *)(dest + 0 * stride)); + _unaligned_load64(p0, (unsigned char *)(dest + 0 * stride)); i0 = (vector signed short)vec_mergeh(zero, p0); - _unaligned_load64(p1, (uint32_t *)(dest + 1 * stride)); + _unaligned_load64(p1, (unsigned char *)(dest + 1 * stride)); i4 = vec_add(i0, dc_value); i1 = (vector signed short)vec_mergeh(zero, p1); - _unaligned_load64(p2, (uint32_t *)(dest + 2 * stride)); + _unaligned_load64(p2, (unsigned char *)(dest + 2 * stride)); p0 = vec_packsu(i4, i4); i5 = vec_add(i1, dc_value); - _unaligned_load64(p3, (uint32_t *)(dest + 3 * stride)); + _unaligned_load64(p3, (unsigned char *)(dest + 3 * stride)); i2 = (vector signed short)vec_mergeh(zero, p2); p1 = vec_packsu(i5, i5); _unaligned_store64(p0, ltemp, (uint32_t *)(dest + 0 * stride)); @@ -311,16 +311,16 @@ void vpx_idct8x8_1_add_altivec(const tran_low_t *input, uint8_t *dest, int strid p3 = vec_packsu(i7, i7); _unaligned_store64(p3, ltemp, (uint32_t *)(dest + 3 * stride)); - _unaligned_load64(p0, (uint32_t *)(dest + 4 * stride)); + _unaligned_load64(p0, (unsigned char *)(dest + 4 * stride)); // SSE unpacklo(x,y) becomes vec_mergeh(y,x) i0 = (vector signed short)vec_mergeh(zero, p0); - _unaligned_load64(p1, (uint32_t *)(dest + 5 * stride)); + _unaligned_load64(p1, (unsigned char *)(dest + 5 * stride)); i4 = vec_add(i0, dc_value); i1 = (vector signed short)vec_mergeh(zero, p1); - _unaligned_load64(p2, (uint32_t *)(dest + 6 * stride)); + _unaligned_load64(p2, (unsigned char *)(dest + 6 * stride)); p0 = vec_packsu(i4, i4); i5 = vec_add(i1, dc_value); - _unaligned_load64(p3, (uint32_t *)(dest + 7 * stride)); + _unaligned_load64(p3, (unsigned char *)(dest + 7 * stride)); i2 = (vector signed short)vec_mergeh(zero, p2); p1 = vec_packsu(i5, i5); _unaligned_store64(p0, ltemp, (uint32_t *)(dest + 4 * stride)); @@ -337,7 +337,7 @@ void vpx_idct8x8_1_add_altivec(const tran_low_t *input, uint8_t *dest, int strid void vpx_idct16x16_1_add_altivec(const tran_low_t *input, uint8_t *dest, int stride) { vector signed short dc_value, i0, i1, i2, i3, i4, i5, i6, i7; vector unsigned char p0, p1, p2, p3, p4, p5, p6, p7; - vector unsigned char zero = vec_splat_s8(0); + vector unsigned char zero = vec_splat_u8(0); vector unsigned int ltemp; int a, i; signed short a_s; @@ -350,15 +350,15 @@ void vpx_idct16x16_1_add_altivec(const tran_low_t *input, uint8_t *dest, int str // Massively unrolled. This is probably the limit for that. for(i=0; i<2; ++i) { - _unaligned_load64(p0, (uint32_t *)(dest + 0 * stride)); + _unaligned_load64(p0, (unsigned char *)(dest + 0 * stride)); i0 = (vector signed short)vec_mergeh(zero, p0); - _unaligned_load64(p1, (uint32_t *)(dest + 1 * stride)); + _unaligned_load64(p1, (unsigned char *)(dest + 1 * stride)); i4 = vec_add(i0, dc_value); i1 = (vector signed short)vec_mergeh(zero, p1); - _unaligned_load64(p2, (uint32_t *)(dest + 2 * stride)); + _unaligned_load64(p2, (unsigned char *)(dest + 2 * stride)); p0 = vec_packsu(i4, i4); i5 = vec_add(i1, dc_value); - _unaligned_load64(p3, (uint32_t *)(dest + 3 * stride)); + _unaligned_load64(p3, (unsigned char *)(dest + 3 * stride)); i2 = (vector signed short)vec_mergeh(zero, p2); p1 = vec_packsu(i5, i5); _unaligned_store64(p0, ltemp, (uint32_t *)(dest + 0 * stride)); @@ -371,16 +371,16 @@ void vpx_idct16x16_1_add_altivec(const tran_low_t *input, uint8_t *dest, int str p3 = vec_packsu(i7, i7); _unaligned_store64(p3, ltemp, (uint32_t *)(dest + 3 * stride)); - _unaligned_load64(p0, (uint32_t *)(dest + 4 * stride)); + _unaligned_load64(p0, (unsigned char *)(dest + 4 * stride)); // SSE unpacklo(x,y) becomes vec_mergeh(y,x) i0 = (vector signed short)vec_mergeh(zero, p0); - _unaligned_load64(p1, (uint32_t *)(dest + 5 * stride)); + _unaligned_load64(p1, (unsigned char *)(dest + 5 * stride)); i4 = vec_add(i0, dc_value); i1 = (vector signed short)vec_mergeh(zero, p1); - _unaligned_load64(p2, (uint32_t *)(dest + 6 * stride)); + _unaligned_load64(p2, (unsigned char *)(dest + 6 * stride)); p0 = vec_packsu(i4, i4); i5 = vec_add(i1, dc_value); - _unaligned_load64(p3, (uint32_t *)(dest + 7 * stride)); + _unaligned_load64(p3, (unsigned char *)(dest + 7 * stride)); i2 = (vector signed short)vec_mergeh(zero, p2); p1 = vec_packsu(i5, i5); _unaligned_store64(p0, ltemp, (uint32_t *)(dest + 4 * stride)); @@ -393,15 +393,15 @@ void vpx_idct16x16_1_add_altivec(const tran_low_t *input, uint8_t *dest, int str p3 = vec_packsu(i7, i7); _unaligned_store64(p3, ltemp, (uint32_t *)(dest + 7 * stride)); - _unaligned_load64(p0, (uint32_t *)(dest + 8 * stride)); + _unaligned_load64(p0, (unsigned char *)(dest + 8 * stride)); i0 = (vector signed short)vec_mergeh(zero, p0); - _unaligned_load64(p1, (uint32_t *)(dest + 9 * stride)); + _unaligned_load64(p1, (unsigned char *)(dest + 9 * stride)); i4 = vec_add(i0, dc_value); i1 = (vector signed short)vec_mergeh(zero, p1); - _unaligned_load64(p2, (uint32_t *)(dest + 10 * stride)); + _unaligned_load64(p2, (unsigned char *)(dest + 10 * stride)); p0 = vec_packsu(i4, i4); i5 = vec_add(i1, dc_value); - _unaligned_load64(p3, (uint32_t *)(dest + 11 * stride)); + _unaligned_load64(p3, (unsigned char *)(dest + 11 * stride)); i2 = (vector signed short)vec_mergeh(zero, p2); p1 = vec_packsu(i5, i5); _unaligned_store64(p0, ltemp, (uint32_t *)(dest + 8 * stride)); @@ -414,15 +414,15 @@ void vpx_idct16x16_1_add_altivec(const tran_low_t *input, uint8_t *dest, int str p3 = vec_packsu(i7, i7); _unaligned_store64(p3, ltemp, (uint32_t *)(dest + 11 * stride)); - _unaligned_load64(p0, (uint32_t *)(dest + 12 * stride)); + _unaligned_load64(p0, (unsigned char *)(dest + 12 * stride)); i0 = (vector signed short)vec_mergeh(zero, p0); - _unaligned_load64(p1, (uint32_t *)(dest + 13 * stride)); + _unaligned_load64(p1, (unsigned char *)(dest + 13 * stride)); i4 = vec_add(i0, dc_value); i1 = (vector signed short)vec_mergeh(zero, p1); - _unaligned_load64(p2, (uint32_t *)(dest + 14 * stride)); + _unaligned_load64(p2, (unsigned char *)(dest + 14 * stride)); p0 = vec_packsu(i4, i4); i5 = vec_add(i1, dc_value); - _unaligned_load64(p3, (uint32_t *)(dest + 15 * stride)); + _unaligned_load64(p3, (unsigned char *)(dest + 15 * stride)); i2 = (vector signed short)vec_mergeh(zero, p2); p1 = vec_packsu(i5, i5); _unaligned_store64(p0, ltemp, (uint32_t *)(dest + 12 * stride)); @@ -442,7 +442,7 @@ void vpx_idct16x16_1_add_altivec(const tran_low_t *input, uint8_t *dest, int str void vpx_idct32x32_1_add_altivec(const tran_low_t *input, uint8_t *dest, int stride) { vector signed short dc_value, i0, i1; vector unsigned char p0; - vector unsigned char zero = vec_splat_s8(0); + vector unsigned char zero = vec_splat_u8(0); vector unsigned int ltemp; int a, i, j; signed short a_s; @@ -457,7 +457,7 @@ void vpx_idct32x32_1_add_altivec(const tran_low_t *input, uint8_t *dest, int str for (i=0; i<4; ++i) { for(j=0; j<32; ++j) { - _unaligned_load64(p0, (uint32_t *)(dest + j * stride)); + _unaligned_load64(p0, (unsigned char *)(dest + j * stride)); i0 = (vector signed short)vec_mergeh(zero, p0); i1 = vec_add(i0, dc_value); p0 = vec_packsu(i1, i1); @@ -515,7 +515,7 @@ static void iadst4_vmx(vector signed short *in) { vector signed short k__sinpi_p03_m04 = short_pair_a(sinpi_3_9, -sinpi_4_9); vector signed short k__sinpi_p03_p03 = short_pair_a(sinpi_3_9, sinpi_3_9); vector signed short zero = vec_splat_s16(0); - vector unsigned int twoi = vec_splat_s32(2); + vector unsigned int twoi = vec_splat_u32(2); vector signed short u[7], in7; vector signed int v[7], w[7]; // For easier hand modeling I manually inlined the SSE2 transposition function. @@ -574,13 +574,13 @@ void vp9_iht4x4_16_add_altivec(const tran_low_t *input, uint8_t *dest, int strid vector unsigned int ltemp; vector unsigned char result; vector signed int wnput0, wnput1, wnput2, wnput3; - vector unsigned char zero = vec_splat_s8(0); - vector unsigned char one = vec_splat_s8(1); - vector unsigned short four = vec_splat_s16(4); + vector unsigned char zero = vec_splat_u8(0); + vector unsigned char one = vec_splat_u8(1); + vector unsigned short four = vec_splat_u16(4); vector signed short eight = vec_splat_s16(8); - _unaligned_load128(in[0], (uint32_t *)(input)); - _unaligned_load128(in[1], (uint32_t *)(input + 8)); + _unaligned_load128(in[0], (const signed short *)(input)); + _unaligned_load128(in[1], (const signed short *)(input + 8)); switch (tx_type) { case 0: { // DCT_DCT @@ -616,12 +616,12 @@ void vp9_iht4x4_16_add_altivec(const tran_low_t *input, uint8_t *dest, int strid // Reconstruct, pack and store (mostly the same as idct4x4_16). // Get the destination values we're going to merge with. - _unaligned_load32(wnput0, (uint32_t *)dest); - _unaligned_load32(wnput1, (uint32_t *)(dest + stride)); + _unaligned_load32(wnput0, (signed int *)dest); + _unaligned_load32(wnput1, (signed int *)(dest + stride)); wnput0 = vec_mergeh(wnput0, wnput1); - _unaligned_load32(wnput2, (uint32_t *)(dest + stride + stride)); + _unaligned_load32(wnput2, (signed int *)(dest + stride + stride)); wnput0 = (vector signed int)vec_mergeh(zero, (vector unsigned char)wnput0); - _unaligned_load32(wnput3, (uint32_t *)(dest + stride + stride + stride)); + _unaligned_load32(wnput3, (signed int *)(dest + stride + stride + stride)); wnput2 = vec_mergeh(wnput2, wnput3); wnput2 = (vector signed int)vec_mergeh(zero, (vector unsigned char)wnput2); @@ -779,7 +779,7 @@ void vpx_idct8x8_64_add_altivec(const tran_low_t *input, uint8_t *dest, int stri vector signed short stp1_0, stp1_1, stp1_2, stp1_3, stp1_4, stp1_5, stp1_6, stp1_7; vector signed int tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; vector signed short stp2_0, stp2_1, stp2_2, stp2_3, stp2_4, stp2_5, stp2_6, stp2_7; - vector unsigned char zero = vec_splat_s8(0); + vector unsigned char zero = vec_splat_u8(0); vector unsigned int ltemp; vector unsigned char p0, p1, p2, p3, p4, p5, p6, p7; vector signed short i0, i1, i2, i3, i4, i5, i6, i7; @@ -788,17 +788,17 @@ void vpx_idct8x8_64_add_altivec(const tran_low_t *input, uint8_t *dest, int stri vector unsigned short four = vec_splat_u16(4); vector unsigned short five = vec_splat_u16(5); vector signed short final_rounding; - final_rounding = vec_rl(one, four); + final_rounding = (vector signed short)vec_rl(one, four); // The Intel mnemonic implies these loads are aligned. - in0 = vec_ld(0, (uint32_t *)input); - in1 = vec_ld(16, (uint32_t *)input); - in2 = vec_ld(32, (uint32_t *)input); - in3 = vec_ld(48, (uint32_t *)input); - in4 = vec_ld(64, (uint32_t *)input); - in5 = vec_ld(80, (uint32_t *)input); - in6 = vec_ld(96, (uint32_t *)input); - in7 = vec_ld(112, (uint32_t *)input); + in0 = vec_ld(0, (const signed short *)input); + in1 = vec_ld(16, (const signed short *)input); + in2 = vec_ld(32, (const signed short *)input); + in3 = vec_ld(48, (const signed short *)input); + in4 = vec_ld(64, (const signed short *)input); + in5 = vec_ld(80, (const signed short *)input); + in6 = vec_ld(96, (const signed short *)input); + in7 = vec_ld(112, (const signed short *)input); TRANSPOSE_8X8(in0, in1, in2, in3, in4, in5, in6, in7, in0, in1, in2, in3, in4, in5, in6, in7); @@ -833,15 +833,15 @@ void vpx_idct8x8_64_add_altivec(const tran_low_t *input, uint8_t *dest, int stri // Unfortunately, these stores are NOT. // Borrowed from idct8x8_1. - _unaligned_load64(p0, (uint32_t *)(dest + 0 * stride)); + _unaligned_load64(p0, (unsigned char *)(dest + 0 * stride)); i0 = (vector signed short)vec_mergeh(zero, p0); - _unaligned_load64(p1, (uint32_t *)(dest + 1 * stride)); + _unaligned_load64(p1, (unsigned char *)(dest + 1 * stride)); i4 = vec_add(i0, in0); i1 = (vector signed short)vec_mergeh(zero, p1); - _unaligned_load64(p2, (uint32_t *)(dest + 2 * stride)); + _unaligned_load64(p2, (unsigned char *)(dest + 2 * stride)); p0 = vec_packsu(i4, i4); i5 = vec_add(i1, in1); - _unaligned_load64(p3, (uint32_t *)(dest + 3 * stride)); + _unaligned_load64(p3, (unsigned char *)(dest + 3 * stride)); i2 = (vector signed short)vec_mergeh(zero, p2); p1 = vec_packsu(i5, i5); _unaligned_store64(p0, ltemp, (uint32_t *)(dest + 0 * stride)); @@ -854,15 +854,15 @@ void vpx_idct8x8_64_add_altivec(const tran_low_t *input, uint8_t *dest, int stri p3 = vec_packsu(i7, i7); _unaligned_store64(p3, ltemp, (uint32_t *)(dest + 3 * stride)); - _unaligned_load64(p0, (uint32_t *)(dest + 4 * stride)); + _unaligned_load64(p0, (unsigned char *)(dest + 4 * stride)); i0 = (vector signed short)vec_mergeh(zero, p0); - _unaligned_load64(p1, (uint32_t *)(dest + 5 * stride)); + _unaligned_load64(p1, (unsigned char *)(dest + 5 * stride)); i4 = vec_add(i0, in4); i1 = (vector signed short)vec_mergeh(zero, p1); - _unaligned_load64(p2, (uint32_t *)(dest + 6 * stride)); + _unaligned_load64(p2, (unsigned char *)(dest + 6 * stride)); p0 = vec_packsu(i4, i4); i5 = vec_add(i1, in5); - _unaligned_load64(p3, (uint32_t *)(dest + 7 * stride)); + _unaligned_load64(p3, (unsigned char *)(dest + 7 * stride)); i2 = (vector signed short)vec_mergeh(zero, p2); p1 = vec_packsu(i5, i5); _unaligned_store64(p0, ltemp, (uint32_t *)(dest + 4 * stride)); @@ -912,8 +912,8 @@ static void iadst8_vmx(vector signed short *in) { vector signed short k__cospi_p16_m16 = short_pair_a(cospi_16_64, -cospi_16_64); signed short a_s = (int16_t)cospi_16_64; vector signed short k__cospi_p16_p16; - vector signed short k__const_0 = vec_splat_u16(0); - vector signed int zero_i = vec_splat_u16(0); + vector signed short k__const_0 = vec_splat_s16(0); + vector signed int zero_i = vec_splat_s32(0); vector signed int u0, u1, u2, u3, u4, u5, u6, u7, u8, u9, u10, u11, u12, u13, u14, u15; vector signed int v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11, v12, v13, v14, v15; vector signed int w0, w1, w2, w3, w4, w5, w6, w7, w8, w9, w10, w11, w12, w13, w14, w15; @@ -1130,7 +1130,7 @@ static void iadst8_vmx(vector signed short *in) { void vp9_iht8x8_64_add_altivec(const tran_low_t *input, uint8_t *dest, int stride, int tx_type) { vector signed short in[8]; - vector unsigned char zero = vec_splat_s8(0); + vector unsigned char zero = vec_splat_u8(0); vector unsigned int ltemp; vector unsigned char p0, p1, p2, p3, p4, p5, p6, p7; vector signed short i0, i1, i2, i3, i4, i5, i6, i7; @@ -1139,17 +1139,17 @@ void vp9_iht8x8_64_add_altivec(const tran_low_t *input, uint8_t *dest, int strid vector unsigned short four = vec_splat_u16(4); vector unsigned short five = vec_splat_u16(5); vector signed short final_rounding; - final_rounding = vec_rl(one, four); + final_rounding = (vector signed short)vec_rl(one, four); // The Intel mnemonic implies these loads are aligned. - in[0] = vec_ld(0, (uint32_t *)input); - in[1] = vec_ld(16, (uint32_t *)input); - in[2] = vec_ld(32, (uint32_t *)input); - in[3] = vec_ld(48, (uint32_t *)input); - in[4] = vec_ld(64, (uint32_t *)input); - in[5] = vec_ld(80, (uint32_t *)input); - in[6] = vec_ld(96, (uint32_t *)input); - in[7] = vec_ld(112, (uint32_t *)input); + in[0] = vec_ld(0, (const signed short *)input); + in[1] = vec_ld(16, (const signed short *)input); + in[2] = vec_ld(32, (const signed short *)input); + in[3] = vec_ld(48, (const signed short *)input); + in[4] = vec_ld(64, (const signed short *)input); + in[5] = vec_ld(80, (const signed short *)input); + in[6] = vec_ld(96, (const signed short *)input); + in[7] = vec_ld(112, (const signed short *)input); switch (tx_type) { case 0: // DCT_DCT @@ -1193,15 +1193,15 @@ void vp9_iht8x8_64_add_altivec(const tran_low_t *input, uint8_t *dest, int strid in[6] = vec_sra(in[6], five); in[7] = vec_sra(in[7], five); - _unaligned_load64(p0, (uint32_t *)(dest + 0 * stride)); + _unaligned_load64(p0, (unsigned char *)(dest + 0 * stride)); i0 = (vector signed short)vec_mergeh(zero, p0); - _unaligned_load64(p1, (uint32_t *)(dest + 1 * stride)); + _unaligned_load64(p1, (unsigned char *)(dest + 1 * stride)); i4 = vec_add(i0, in[0]); i1 = (vector signed short)vec_mergeh(zero, p1); - _unaligned_load64(p2, (uint32_t *)(dest + 2 * stride)); + _unaligned_load64(p2, (unsigned char *)(dest + 2 * stride)); p0 = vec_packsu(i4, i4); i5 = vec_add(i1, in[1]); - _unaligned_load64(p3, (uint32_t *)(dest + 3 * stride)); + _unaligned_load64(p3, (unsigned char *)(dest + 3 * stride)); i2 = (vector signed short)vec_mergeh(zero, p2); p1 = vec_packsu(i5, i5); _unaligned_store64(p0, ltemp, (uint32_t *)(dest + 0 * stride)); @@ -1214,15 +1214,15 @@ void vp9_iht8x8_64_add_altivec(const tran_low_t *input, uint8_t *dest, int strid p3 = vec_packsu(i7, i7); _unaligned_store64(p3, ltemp, (uint32_t *)(dest + 3 * stride)); - _unaligned_load64(p0, (uint32_t *)(dest + 4 * stride)); + _unaligned_load64(p0, (unsigned char *)(dest + 4 * stride)); i0 = (vector signed short)vec_mergeh(zero, p0); - _unaligned_load64(p1, (uint32_t *)(dest + 5 * stride)); + _unaligned_load64(p1, (unsigned char *)(dest + 5 * stride)); i4 = vec_add(i0, in[4]); i1 = (vector signed short)vec_mergeh(zero, p1); - _unaligned_load64(p2, (uint32_t *)(dest + 6 * stride)); + _unaligned_load64(p2, (unsigned char *)(dest + 6 * stride)); p0 = vec_packsu(i4, i4); i5 = vec_add(i1, in[5]); - _unaligned_load64(p3, (uint32_t *)(dest + 7 * stride)); + _unaligned_load64(p3, (unsigned char *)(dest + 7 * stride)); i2 = (vector signed short)vec_mergeh(zero, p2); p1 = vec_packsu(i5, i5); _unaligned_store64(p0, ltemp, (uint32_t *)(dest + 4 * stride)); @@ -1259,12 +1259,12 @@ void vp9_iht8x8_64_add_altivec(const tran_low_t *input, uint8_t *dest, int strid { \ vector signed short tr0_0 = vec_mergeh(in0, in1); \ vector signed short tr0_1 = vec_mergeh(in2, in3); \ - out0 = vec_mergeh((vector signed int)tr0_0, (vector signed int)tr0_1); \ - out1 = vec_mergel((vector signed int)tr0_0, (vector signed int)tr0_1); \ + out0 = (vector signed short)vec_mergeh((vector signed int)tr0_0, (vector signed int)tr0_1); \ + out1 = (vector signed short)vec_mergel((vector signed int)tr0_0, (vector signed int)tr0_1); \ } void vpx_idct8x8_12_add_altivec(const tran_low_t *input, uint8_t *dest, int stride) { - vector signed short zero_s = vec_splat_u16(0); + vector signed short zero_s = vec_splat_s16(0); vector unsigned char zero = vec_splat_u8(0); vector signed short stg1_0 = short_pair_a(cospi_28_64, -cospi_4_64); vector signed short stg1_1 = short_pair_a(cospi_4_64, cospi_28_64); @@ -1289,14 +1289,14 @@ void vpx_idct8x8_12_add_altivec(const tran_low_t *input, uint8_t *dest, int stri vector unsigned short four = vec_splat_u16(4); vector unsigned short five = vec_splat_u16(5); vector signed short final_rounding; - final_rounding = vec_rl(one, four); + final_rounding = (vector signed short)vec_rl(one, four); // Rows. Load 4-row input data. // Praise the Lord it's still aligned, yes? - in0 = vec_ld(0, (uint32_t *)input); - in1 = vec_ld(16, (uint32_t *)input); - in2 = vec_ld(32, (uint32_t *)input); - in3 = vec_ld(48, (uint32_t *)input); + in0 = vec_ld(0, (const signed short *)input); + in1 = vec_ld(16, (const signed short *)input); + in2 = vec_ld(32, (const signed short *)input); + in3 = vec_ld(48, (const signed short *)input); // 8x4 transpose. TRANSPOSE_8X8_10(in0, in1, in2, in3, in0, in1); @@ -1399,15 +1399,15 @@ void vpx_idct8x8_12_add_altivec(const tran_low_t *input, uint8_t *dest, int stri in6 = vec_sra(in6, five); in7 = vec_sra(in7, five); - _unaligned_load64(p0, (uint32_t *)(dest + 0 * stride)); + _unaligned_load64(p0, (unsigned char *)(dest + 0 * stride)); i0 = (vector signed short)vec_mergeh(zero, p0); - _unaligned_load64(p1, (uint32_t *)(dest + 1 * stride)); + _unaligned_load64(p1, (unsigned char *)(dest + 1 * stride)); i4 = vec_add(i0, in0); i1 = (vector signed short)vec_mergeh(zero, p1); - _unaligned_load64(p2, (uint32_t *)(dest + 2 * stride)); + _unaligned_load64(p2, (unsigned char *)(dest + 2 * stride)); p0 = vec_packsu(i4, i4); i5 = vec_add(i1, in1); - _unaligned_load64(p3, (uint32_t *)(dest + 3 * stride)); + _unaligned_load64(p3, (unsigned char *)(dest + 3 * stride)); i2 = (vector signed short)vec_mergeh(zero, p2); p1 = vec_packsu(i5, i5); _unaligned_store64(p0, ltemp, (uint32_t *)(dest + 0 * stride)); @@ -1420,15 +1420,15 @@ void vpx_idct8x8_12_add_altivec(const tran_low_t *input, uint8_t *dest, int stri p3 = vec_packsu(i7, i7); _unaligned_store64(p3, ltemp, (uint32_t *)(dest + 3 * stride)); - _unaligned_load64(p0, (uint32_t *)(dest + 4 * stride)); + _unaligned_load64(p0, (unsigned char *)(dest + 4 * stride)); i0 = (vector signed short)vec_mergeh(zero, p0); - _unaligned_load64(p1, (uint32_t *)(dest + 5 * stride)); + _unaligned_load64(p1, (unsigned char *)(dest + 5 * stride)); i4 = vec_add(i0, in4); i1 = (vector signed short)vec_mergeh(zero, p1); - _unaligned_load64(p2, (uint32_t *)(dest + 6 * stride)); + _unaligned_load64(p2, (unsigned char *)(dest + 6 * stride)); p0 = vec_packsu(i4, i4); i5 = vec_add(i1, in5); - _unaligned_load64(p3, (uint32_t *)(dest + 7 * stride)); + _unaligned_load64(p3, (unsigned char *)(dest + 7 * stride)); i2 = (vector signed short)vec_mergeh(zero, p2); p1 = vec_packsu(i5, i5); _unaligned_store64(p0, ltemp, (uint32_t *)(dest + 4 * stride)); @@ -1639,13 +1639,13 @@ void vpx_idct16x16_256_add_altivec(const tran_low_t *input, uint8_t *dest, vector unsigned char p0; vector unsigned char zero = vec_splat_u8(0); vector unsigned short one = vec_splat_u16(1); - vector unsigned short five = vec_splat_u8(5); - vector unsigned short six = vec_splat_u8(6); + vector unsigned short five = vec_splat_u16(5); + vector unsigned short six = vec_splat_u16(6); vector signed short final_rounding; vector unsigned int ltemp; int i, j; - final_rounding = vec_rl(one, five); + final_rounding = (vector signed short)vec_rl(one, five); // Part I. // Little benefit to unrolling these loops since we alternate @@ -1655,22 +1655,22 @@ void vpx_idct16x16_256_add_altivec(const tran_low_t *input, uint8_t *dest, // 1-D IDCT. // Load (aligned) input. - in[0] = vec_ld(0, (uint32_t *)input); - in[8] = vec_ld(16, (uint32_t *)input); - in[1] = vec_ld(32, (uint32_t *)input); - in[9] = vec_ld(48, (uint32_t *)input); - in[2] = vec_ld(64, (uint32_t *)input); - in[10] = vec_ld(80, (uint32_t *)input); - in[3] = vec_ld(96, (uint32_t *)input); - in[11] = vec_ld(112, (uint32_t *)input); - in[4] = vec_ld(128, (uint32_t *)input); - in[12] = vec_ld(144, (uint32_t *)input); - in[5] = vec_ld(160, (uint32_t *)input); - in[13] = vec_ld(176, (uint32_t *)input); - in[6] = vec_ld(192, (uint32_t *)input); - in[14] = vec_ld(208, (uint32_t *)input); - in[7] = vec_ld(224, (uint32_t *)input); - in[15] = vec_ld(240, (uint32_t *)input); + in[0] = vec_ld(0, (const signed short *)input); + in[8] = vec_ld(16, (const signed short *)input); + in[1] = vec_ld(32, (const signed short *)input); + in[9] = vec_ld(48, (const signed short *)input); + in[2] = vec_ld(64, (const signed short *)input); + in[10] = vec_ld(80, (const signed short *)input); + in[3] = vec_ld(96, (const signed short *)input); + in[11] = vec_ld(112, (const signed short *)input); + in[4] = vec_ld(128, (const signed short *)input); + in[12] = vec_ld(144, (const signed short *)input); + in[5] = vec_ld(160, (const signed short *)input); + in[13] = vec_ld(176, (const signed short *)input); + in[6] = vec_ld(192, (const signed short *)input); + in[14] = vec_ld(208, (const signed short *)input); + in[7] = vec_ld(224, (const signed short *)input); + in[15] = vec_ld(240, (const signed short *)input); array_transpose_8x8(in, in); array_transpose_8x8(in + 8, in + 8); @@ -1730,7 +1730,7 @@ void vpx_idct16x16_256_add_altivec(const tran_low_t *input, uint8_t *dest, in[j] = vec_sra(in[j], six); // Reconstitute and store. - _unaligned_load64(p0, (uint32_t *)(dest + j * stride)); + _unaligned_load64(p0, (unsigned char *)(dest + j * stride)); i0 = (vector signed short)vec_mergeh(zero, p0); i0 = vec_add(in[j], i0); p0 = vec_packsu(i0, i0); @@ -1750,8 +1750,8 @@ void vpx_idct16x16_256_add_altivec(const tran_low_t *input, uint8_t *dest, vector signed short tr0_0 = vec_mergeh(in0, in1); \ vector signed short tr0_1 = vec_mergeh(in2, in3); \ \ - out0 = vec_mergeh((vector signed int)tr0_0, (vector signed int)tr0_1); /* i1 i0 */ \ - out1 = vec_mergel((vector signed int)tr0_0, (vector signed int)tr0_1); /* i3 i2 */ \ + out0 = (vector signed short)vec_mergeh((vector signed int)tr0_0, (vector signed int)tr0_1); /* i1 i0 */ \ + out1 = (vector signed short)vec_mergel((vector signed int)tr0_0, (vector signed int)tr0_1); /* i3 i2 */ \ } // However, *this* is correct. @@ -1919,7 +1919,7 @@ void vpx_idct16x16_10_add_altivec(const tran_low_t *input, uint8_t *dest, vector signed short smp0, smp1, smp2, smp3; vector signed int tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; vector unsigned char p0; - vector signed short zero = vec_splat_u16(0); + vector signed short zero = vec_splat_s16(0); vector unsigned char zero_c = vec_splat_u8(0); vector unsigned short one = vec_splat_u16(1); vector unsigned short five = vec_splat_u16(5); @@ -1928,14 +1928,14 @@ void vpx_idct16x16_10_add_altivec(const tran_low_t *input, uint8_t *dest, vector unsigned int ltemp; int i, j; - final_rounding = vec_rl(one, five); + final_rounding = (vector signed short)vec_rl(one, five); // First 1-D inverse DCT. // Stage 1: load input data (aligned). - in[0] = vec_ld(0, (uint32_t *)input); - in[1] = vec_ld(32, (uint32_t *)input); // Yes, really. We're skipping every other. - in[2] = vec_ld(64, (uint32_t *)input); - in[3] = vec_ld(96, (uint32_t *)input); + in[0] = vec_ld(0, (const signed short *)input); + in[1] = vec_ld(32, (const signed short *)input); // Yes, really. We're skipping every other. + in[2] = vec_ld(64, (const signed short *)input); + in[3] = vec_ld(96, (const signed short *)input); TRANSPOSE_8X4(in[0], in[1], in[2], in[3], in[0], in[1]); @@ -2002,10 +2002,10 @@ void vpx_idct16x16_10_add_altivec(const tran_low_t *input, uint8_t *dest, // Stages 5 and 6. { - tmp0 = vec_add(stp2_8, stp2_11); - tmp1 = vec_sub(stp2_8, stp2_11); - tmp2 = vec_add(stp2_9, stp2_10); - tmp3 = vec_sub(stp2_9, stp2_10); + tmp0 = (vector signed int)vec_add(stp2_8, stp2_11); + tmp1 = (vector signed int)vec_sub(stp2_8, stp2_11); + tmp2 = (vector signed int)vec_add(stp2_9, stp2_10); + tmp3 = (vector signed int)vec_sub(stp2_9, stp2_10); stp1_9 = (vector signed short)vec_perm(tmp2, (vector signed int)zero, merge64_hvec); stp1_10 = (vector signed short)vec_perm(tmp3, (vector signed int)zero, merge64_hvec); @@ -2105,7 +2105,7 @@ void vpx_idct16x16_10_add_altivec(const tran_low_t *input, uint8_t *dest, in[j] = vec_sra(in[j], six); // Reconstitute and store. - _unaligned_load64(p0, (uint32_t *)(dest + j * stride)); + _unaligned_load64(p0, (unsigned char *)(dest + j * stride)); i0 = (vector signed short)vec_mergeh(zero_c, p0); i0 = vec_add(in[j], i0); p0 = vec_packsu(i0, i0); @@ -2438,7 +2438,7 @@ void vpx_idct32x32_34_add_altivec(const tran_low_t *input, uint8_t *dest, vector signed short stg4_6 = short_pair_a(-cospi_24_64, -cospi_8_64); vector signed short stg6_0 = short_pair_a(-cospi_16_64, cospi_16_64); - vector signed short zero = vec_splat_u16(0); + vector signed short zero = vec_splat_s16(0); vector unsigned char zero_c = vec_splat_u8(0); vector unsigned short one = vec_splat_u16(1); vector unsigned short five = vec_splat_u16(5); @@ -2461,17 +2461,17 @@ void vpx_idct32x32_34_add_altivec(const tran_low_t *input, uint8_t *dest, vector signed int tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; int i, j; - final_rounding = vec_rl(one, five); + final_rounding = (vector signed short)vec_rl(one, five); // Load vectors from top left 8x8 block. - in[0] = vec_ld(0, (uint32_t *)input); - in[1] = vec_ld(64, (uint32_t *)input); - in[2] = vec_ld(128, (uint32_t *)input); - in[3] = vec_ld(192, (uint32_t *)input); - in[4] = vec_ld(256, (uint32_t *)input); - in[5] = vec_ld(320, (uint32_t *)input); - in[6] = vec_ld(384, (uint32_t *)input); - in[7] = vec_ld(448, (uint32_t *)input); + in[0] = vec_ld(0, (const signed short *)input); + in[1] = vec_ld(64, (const signed short *)input); + in[2] = vec_ld(128, (const signed short *)input); + in[3] = vec_ld(192, (const signed short *)input); + in[4] = vec_ld(256, (const signed short *)input); + in[5] = vec_ld(320, (const signed short *)input); + in[6] = vec_ld(384, (const signed short *)input); + in[7] = vec_ld(448, (const signed short *)input); // 1-D IDCT. // Store intermediate results for each 8x32 block. @@ -2554,7 +2554,7 @@ void vpx_idct32x32_34_add_altivec(const tran_low_t *input, uint8_t *dest, in[j] = vec_adds(in[j], final_rounding); in[j] = vec_sra(in[j], six); - _unaligned_load64(p0, (uint32_t *)(dest + j * stride)); + _unaligned_load64(p0, (unsigned char *)(dest + j * stride)); i0 = (vector signed short)vec_mergeh(zero_c, p0); i0 = vec_add(in[j], i0); p0 = vec_packsu(i0, i0); @@ -2953,7 +2953,7 @@ void vpx_idct32x32_1024_add_altivec(const tran_low_t *input, uint8_t *dest, stp2_30, stp2_31; vector signed int tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; int i, j, i32; - vector signed short zero = vec_splat_u16(0); + vector signed short zero = vec_splat_s16(0); vector unsigned char zero_c = vec_splat_u8(0); vector unsigned short one = vec_splat_u16(1); vector unsigned short five = vec_splat_u16(5); @@ -2962,45 +2962,45 @@ void vpx_idct32x32_1024_add_altivec(const tran_low_t *input, uint8_t *dest, vector unsigned int ltemp; vector unsigned char p0; - final_rounding = vec_rl(one, five); + final_rounding = (vector signed short)vec_rl(one, five); for(i=0;i<4;i++) { // 1-D IDCT. // Load next block. i32 = (i << 5); - in[0] = vec_ld(0, (uint32_t *)input); - in[8] = vec_ld(16, (uint32_t *)input); - in[16] = vec_ld(32, (uint32_t *)input); - in[24] = vec_ld(48, (uint32_t *)input); - in[1] = vec_ld(64, (uint32_t *)input); - in[9] = vec_ld(80, (uint32_t *)input); - in[17] = vec_ld(96, (uint32_t *)input); - in[25] = vec_ld(112, (uint32_t *)input); - in[2] = vec_ld(128, (uint32_t *)input); - in[10] = vec_ld(144, (uint32_t *)input); - in[18] = vec_ld(160, (uint32_t *)input); - in[26] = vec_ld(176, (uint32_t *)input); - in[3] = vec_ld(192, (uint32_t *)input); - in[11] = vec_ld(208, (uint32_t *)input); - in[19] = vec_ld(224, (uint32_t *)input); - in[27] = vec_ld(240, (uint32_t *)input); - in[4] = vec_ld(256, (uint32_t *)input); - in[12] = vec_ld(272, (uint32_t *)input); - in[20] = vec_ld(288, (uint32_t *)input); - in[28] = vec_ld(304, (uint32_t *)input); - in[5] = vec_ld(320, (uint32_t *)input); - in[13] = vec_ld(336, (uint32_t *)input); - in[21] = vec_ld(352, (uint32_t *)input); - in[29] = vec_ld(368, (uint32_t *)input); - in[6] = vec_ld(384, (uint32_t *)input); - in[14] = vec_ld(400, (uint32_t *)input); - in[22] = vec_ld(416, (uint32_t *)input); - in[30] = vec_ld(432, (uint32_t *)input); - in[7] = vec_ld(448, (uint32_t *)input); - in[15] = vec_ld(464, (uint32_t *)input); - in[23] = vec_ld(480, (uint32_t *)input); - in[31] = vec_ld(496, (uint32_t *)input); + in[0] = vec_ld(0, (const signed short *)input); + in[8] = vec_ld(16, (const signed short *)input); + in[16] = vec_ld(32, (const signed short *)input); + in[24] = vec_ld(48, (const signed short *)input); + in[1] = vec_ld(64, (const signed short *)input); + in[9] = vec_ld(80, (const signed short *)input); + in[17] = vec_ld(96, (const signed short *)input); + in[25] = vec_ld(112, (const signed short *)input); + in[2] = vec_ld(128, (const signed short *)input); + in[10] = vec_ld(144, (const signed short *)input); + in[18] = vec_ld(160, (const signed short *)input); + in[26] = vec_ld(176, (const signed short *)input); + in[3] = vec_ld(192, (const signed short *)input); + in[11] = vec_ld(208, (const signed short *)input); + in[19] = vec_ld(224, (const signed short *)input); + in[27] = vec_ld(240, (const signed short *)input); + in[4] = vec_ld(256, (const signed short *)input); + in[12] = vec_ld(272, (const signed short *)input); + in[20] = vec_ld(288, (const signed short *)input); + in[28] = vec_ld(304, (const signed short *)input); + in[5] = vec_ld(320, (const signed short *)input); + in[13] = vec_ld(336, (const signed short *)input); + in[21] = vec_ld(352, (const signed short *)input); + in[29] = vec_ld(368, (const signed short *)input); + in[6] = vec_ld(384, (const signed short *)input); + in[14] = vec_ld(400, (const signed short *)input); + in[22] = vec_ld(416, (const signed short *)input); + in[30] = vec_ld(432, (const signed short *)input); + in[7] = vec_ld(448, (const signed short *)input); + in[15] = vec_ld(464, (const signed short *)input); + in[23] = vec_ld(480, (const signed short *)input); + in[31] = vec_ld(496, (const signed short *)input); input += 256; // Are all entries zero? If so, the result is zero. @@ -3041,38 +3041,38 @@ void vpx_idct32x32_1024_add_altivec(const tran_low_t *input, uint8_t *dest, zero_idx[14] = vec_or(zero_idx[12], zero_idx[13]); if(vec_all_eq(zero_idx[14], zero)) { - col[i32 + 0] = vec_splat_u16(0); - col[i32 + 1] = vec_splat_u16(0); - col[i32 + 2] = vec_splat_u16(0); - col[i32 + 3] = vec_splat_u16(0); - col[i32 + 4] = vec_splat_u16(0); - col[i32 + 5] = vec_splat_u16(0); - col[i32 + 6] = vec_splat_u16(0); - col[i32 + 7] = vec_splat_u16(0); - col[i32 + 8] = vec_splat_u16(0); - col[i32 + 9] = vec_splat_u16(0); - col[i32 + 10] = vec_splat_u16(0); - col[i32 + 11] = vec_splat_u16(0); - col[i32 + 12] = vec_splat_u16(0); - col[i32 + 13] = vec_splat_u16(0); - col[i32 + 14] = vec_splat_u16(0); - col[i32 + 15] = vec_splat_u16(0); - col[i32 + 16] = vec_splat_u16(0); - col[i32 + 17] = vec_splat_u16(0); - col[i32 + 18] = vec_splat_u16(0); - col[i32 + 19] = vec_splat_u16(0); - col[i32 + 20] = vec_splat_u16(0); - col[i32 + 21] = vec_splat_u16(0); - col[i32 + 22] = vec_splat_u16(0); - col[i32 + 23] = vec_splat_u16(0); - col[i32 + 24] = vec_splat_u16(0); - col[i32 + 25] = vec_splat_u16(0); - col[i32 + 26] = vec_splat_u16(0); - col[i32 + 27] = vec_splat_u16(0); - col[i32 + 28] = vec_splat_u16(0); - col[i32 + 29] = vec_splat_u16(0); - col[i32 + 30] = vec_splat_u16(0); - col[i32 + 31] = vec_splat_u16(0); + col[i32 + 0] = vec_splat_s16(0); + col[i32 + 1] = vec_splat_s16(0); + col[i32 + 2] = vec_splat_s16(0); + col[i32 + 3] = vec_splat_s16(0); + col[i32 + 4] = vec_splat_s16(0); + col[i32 + 5] = vec_splat_s16(0); + col[i32 + 6] = vec_splat_s16(0); + col[i32 + 7] = vec_splat_s16(0); + col[i32 + 8] = vec_splat_s16(0); + col[i32 + 9] = vec_splat_s16(0); + col[i32 + 10] = vec_splat_s16(0); + col[i32 + 11] = vec_splat_s16(0); + col[i32 + 12] = vec_splat_s16(0); + col[i32 + 13] = vec_splat_s16(0); + col[i32 + 14] = vec_splat_s16(0); + col[i32 + 15] = vec_splat_s16(0); + col[i32 + 16] = vec_splat_s16(0); + col[i32 + 17] = vec_splat_s16(0); + col[i32 + 18] = vec_splat_s16(0); + col[i32 + 19] = vec_splat_s16(0); + col[i32 + 20] = vec_splat_s16(0); + col[i32 + 21] = vec_splat_s16(0); + col[i32 + 22] = vec_splat_s16(0); + col[i32 + 23] = vec_splat_s16(0); + col[i32 + 24] = vec_splat_s16(0); + col[i32 + 25] = vec_splat_s16(0); + col[i32 + 26] = vec_splat_s16(0); + col[i32 + 27] = vec_splat_s16(0); + col[i32 + 28] = vec_splat_s16(0); + col[i32 + 29] = vec_splat_s16(0); + col[i32 + 30] = vec_splat_s16(0); + col[i32 + 31] = vec_splat_s16(0); continue; } @@ -3167,7 +3167,7 @@ void vpx_idct32x32_1024_add_altivec(const tran_low_t *input, uint8_t *dest, in[j] = vec_adds(in[j], final_rounding); in[j] = vec_sra(in[j], six); - _unaligned_load64(p0, (uint32_t *)(dest + j * stride)); + _unaligned_load64(p0, (unsigned char *)(dest + j * stride)); i0 = (vector signed short)vec_mergeh(zero_c, p0); i0 = vec_add(in[j], i0); p0 = vec_packsu(i0, i0); @@ -3195,22 +3195,22 @@ static inline void array_transpose_16x16(vector signed short *res0, vector signe } static inline void load_buffer_8x16(const tran_low_t *input, vector signed short *in) { - in[0] = vec_ld(0, (uint32_t *)input); - in[1] = vec_ld(32, (uint32_t *)input); - in[2] = vec_ld(64, (uint32_t *)input); - in[3] = vec_ld(96, (uint32_t *)input); - in[4] = vec_ld(128, (uint32_t *)input); - in[5] = vec_ld(160, (uint32_t *)input); - in[6] = vec_ld(192, (uint32_t *)input); - in[7] = vec_ld(224, (uint32_t *)input); - in[8] = vec_ld(256, (uint32_t *)input); - in[9] = vec_ld(288, (uint32_t *)input); - in[10] = vec_ld(320, (uint32_t *)input); - in[11] = vec_ld(352, (uint32_t *)input); - in[12] = vec_ld(384, (uint32_t *)input); - in[13] = vec_ld(416, (uint32_t *)input); - in[14] = vec_ld(448, (uint32_t *)input); - in[15] = vec_ld(480, (uint32_t *)input); + in[0] = vec_ld(0, (const signed short *)input); + in[1] = vec_ld(32, (const signed short *)input); + in[2] = vec_ld(64, (const signed short *)input); + in[3] = vec_ld(96, (const signed short *)input); + in[4] = vec_ld(128, (const signed short *)input); + in[5] = vec_ld(160, (const signed short *)input); + in[6] = vec_ld(192, (const signed short *)input); + in[7] = vec_ld(224, (const signed short *)input); + in[8] = vec_ld(256, (const signed short *)input); + in[9] = vec_ld(288, (const signed short *)input); + in[10] = vec_ld(320, (const signed short *)input); + in[11] = vec_ld(352, (const signed short *)input); + in[12] = vec_ld(384, (const signed short *)input); + in[13] = vec_ld(416, (const signed short *)input); + in[14] = vec_ld(448, (const signed short *)input); + in[15] = vec_ld(480, (const signed short *)input); } static inline void write_buffer_8x16(uint8_t *dest, vector signed short *in, int stride) { @@ -3223,14 +3223,14 @@ static inline void write_buffer_8x16(uint8_t *dest, vector signed short *in, int vector unsigned char p0; int i; - final_rounding = vec_rl(one, five); + final_rounding = (vector signed short)vec_rl(one, five); // Round, shift, reconstitute and store, again. for(i=0;i<16;i++) { in[i] = vec_adds(in[i], final_rounding); in[i] = vec_sra(in[i], six); - _unaligned_load64(p0, (uint32_t *)(dest + i * stride)); + _unaligned_load64(p0, (unsigned char *)(dest + i * stride)); i0 = (vector signed short)vec_mergeh(zero_c, p0); i0 = vec_add(in[i], i0); p0 = vec_packsu(i0, i0); @@ -3272,8 +3272,8 @@ static void iadst16_8col(vector signed short *in) { vector signed short k__cospi_p16_p16; vector signed short k__cospi_p16_m16 = short_pair_a(cospi_16_64, -cospi_16_64); vector signed short k__cospi_m16_p16 = short_pair_a(-cospi_16_64, cospi_16_64); - vector signed short kZero = vec_splat_u16(0); - vector signed int mzero = vec_splat_u16(0); + vector signed short kZero = vec_splat_s16(0); + vector signed int mzero = vec_splat_s32(0); signed short a_s = ((int16_t)-cospi_16_64); signed short b_s = ((int16_t)cospi_16_64); @@ -3748,7 +3748,7 @@ static void idct16_8col(vector signed short *in) { vector signed short s[16], t[16], u[16]; vector signed int v[16], w[16]; - signed short a_s = ((int16_t)cospi_16_64); int j; + signed short a_s = ((int16_t)cospi_16_64); k__cospi_p16_p16 = ss_splat(&a_s); // Stage 1.