From a2654481b813512c2f12e92c8b7d9a39d4dd25a9 Mon Sep 17 00:00:00 2001 From: Developer Date: Tue, 14 Jul 2026 21:49:42 +0000 Subject: [PATCH 14/17] ppc: extend saturating->wraparound add/sub/pack fix to 8x8/16x16/32x32 Same class of bug as the previous IDCT4/IDCT8 fix (commit bc1b8bd1d), applied file-wide: every remaining vec_adds/vec_subs and vec_packs (narrowing round-shift results, matching a WRAPLOW'd reference step) on transform-stage intermediates switched to the non-saturating vec_add/ vec_sub/vec_pack, covering the IDCT16, IDCT16_10, IDCT32, IDCT32_34 macros, the 8x8 partial-coefficient path (vpx_idct8x8_12_add_altivec's custom stage1-4), and the shared "final rounding and shift" step used by every _64/_256/_1024_add and vp9_iht*_add function (ROUND_POWER_OF_TWO on an already-narrowed value feeding straight into the saturating pixel reconstruction, same as the already-fixed vpx_idct4x4_16_add case). vec_packsu (final residual+prediction -> 0..255 pixel clamp) is correctly saturating and left untouched everywhere; only vec_msum's already-non-saturating 32-bit accumulation was unaffected. Verified against the QEMU cross-check harness: vpx_idct8x8_64_add dropped from 499/500 to 10/500 failures, vpx_idct16x16_256_add from 499 to 51-71/500, vpx_idct32x32_1024_add from 499 to ~190/500, and the DCT_DCT (tx_type=0) IHT paths for 8x8/16x16 dropped similarly (9/500, 51/500). Remaining failures in these functions are believed to be the same rare saturation-boundary rounding edge case already seen in the 4x4 path (single-pixel misses at extreme coefficient magnitudes), not yet root-caused. vpx_idct8x8_12_add did not improve (still ~499/500) and has a distinct, not-yet-found bug in its specialized sparse-row partial-IDCT stages -- tracked separately. IADST paths (iadst8_vmx, iadst16_8col, used by tx_type 1-3) are unaffected by this commit and still fail almost universally; being rewritten next the same way iadst4_vmx was (commit 6cd3a5439). Co-Authored-By: Claude Sonnet 5 Claude-Session: https://claude.ai/code/session_01DLC53yuiz8taQDNndUp4rs --- vpx_dsp/ppc/vpx_idct_altivec.c | 304 ++++++++++++++++----------------- 1 file changed, 152 insertions(+), 152 deletions(-) diff --git a/vpx_dsp/ppc/vpx_idct_altivec.c b/vpx_dsp/ppc/vpx_idct_altivec.c index f4d2e5917..4b5690246 100644 --- a/vpx_dsp/ppc/vpx_idct_altivec.c +++ b/vpx_dsp/ppc/vpx_idct_altivec.c @@ -752,10 +752,10 @@ void vp9_iht4x4_16_add_altivec(const tran_low_t *input, uint8_t *dest, int strid tmp6 = vec_sra(tmp6, dct_bitshift_vec); \ tmp7 = vec_sra(tmp7, dct_bitshift_vec); \ \ - res0 = vec_packs(tmp0, tmp1); \ - res1 = vec_packs(tmp2, tmp3); \ - res2 = vec_packs(tmp4, tmp5); \ - res3 = vec_packs(tmp6, tmp7); \ + res0 = vec_pack(tmp0, tmp1); \ + res1 = vec_pack(tmp2, tmp3); \ + res2 = vec_pack(tmp4, tmp5); \ + res3 = vec_pack(tmp6, tmp7); \ } #define IDCT8(in0, in1, in2, in3, in4, in5, in6, in7, \ @@ -810,8 +810,8 @@ void vp9_iht4x4_16_add_altivec(const tran_low_t *input, uint8_t *dest, int strid tmp2 = vec_sra(tmp2, dct_bitshift_vec); \ tmp3 = vec_sra(tmp3, dct_bitshift_vec); \ \ - stp1_5 = vec_packs(tmp0, tmp1); \ - stp1_6 = vec_packs(tmp2, tmp3); \ + stp1_5 = vec_pack(tmp0, tmp1); \ + stp1_6 = vec_pack(tmp2, tmp3); \ } \ \ /* Stage 4. */ \ @@ -873,14 +873,14 @@ void vpx_idct8x8_64_add_altivec(const tran_low_t *input, uint8_t *dest, int stri in0, in1, in2, in3, in4, in5, in6, in7); // Final rounding and shift. - in0 = vec_adds(in0, final_rounding); - in1 = vec_adds(in1, final_rounding); - in2 = vec_adds(in2, final_rounding); - in3 = vec_adds(in3, final_rounding); - in4 = vec_adds(in4, final_rounding); - in5 = vec_adds(in5, final_rounding); - in6 = vec_adds(in6, final_rounding); - in7 = vec_adds(in7, final_rounding); + in0 = vec_add(in0, final_rounding); + in1 = vec_add(in1, final_rounding); + in2 = vec_add(in2, final_rounding); + in3 = vec_add(in3, final_rounding); + in4 = vec_add(in4, final_rounding); + in5 = vec_add(in5, final_rounding); + in6 = vec_add(in6, final_rounding); + in7 = vec_add(in7, final_rounding); in0 = vec_sra(in0, five); in1 = vec_sra(in1, five); @@ -1079,14 +1079,14 @@ static void iadst8_vmx(vector signed short *in) { u15 = vec_sra(v15, dct_bitshift_vec); // Repack to 16 bits for stage 2. - in[0] = vec_packs(u0, u1); - in[1] = vec_packs(u2, u3); - in[2] = vec_packs(u4, u5); - in[3] = vec_packs(u6, u7); - in[4] = vec_packs(u8, u9); - in[5] = vec_packs(u10, u11); - in[6] = vec_packs(u12, u13); - in[7] = vec_packs(u14, u15); + in[0] = vec_pack(u0, u1); + in[1] = vec_pack(u2, u3); + in[2] = vec_pack(u4, u5); + in[3] = vec_pack(u6, u7); + in[4] = vec_pack(u8, u9); + in[5] = vec_pack(u10, u11); + in[6] = vec_pack(u12, u13); + in[7] = vec_pack(u14, u15); // Stage 2. // Interleave the VPERM intrinsics with the VSIUs. @@ -1138,10 +1138,10 @@ static void iadst8_vmx(vector signed short *in) { u7 = vec_sra(v7, dct_bitshift_vec); // Repack for stage 3. - s4 = vec_packs(u0, u1); - s5 = vec_packs(u2, u3); - s6 = vec_packs(u4, u5); - s7 = vec_packs(u6, u7); + s4 = vec_pack(u0, u1); + s5 = vec_pack(u2, u3); + s6 = vec_pack(u4, u5); + s7 = vec_pack(u6, u7); // s4 and s5 are also used in the result, so we // can't clobber them either. @@ -1172,10 +1172,10 @@ static void iadst8_vmx(vector signed short *in) { u7 = vec_sra(v7, dct_bitshift_vec); // Back to shorts and emit final vectors. - s2 = vec_packs(u0, u1); - s3 = vec_packs(u2, u3); - s6 = vec_packs(u4, u5); - s7 = vec_packs(u6, u7); + s2 = vec_pack(u0, u1); + s3 = vec_pack(u2, u3); + s6 = vec_pack(u4, u5); + s7 = vec_pack(u6, u7); in[0] = s0; in[1] = vec_sub(k__const_0, s4); @@ -1235,14 +1235,14 @@ void vp9_iht8x8_64_add_altivec(const tran_low_t *input, uint8_t *dest, int strid // Final rounding and shift, and unaligned recon. // Mostly the same as the straight IDCT. - in[0] = vec_adds(in[0], final_rounding); - in[1] = vec_adds(in[1], final_rounding); - in[2] = vec_adds(in[2], final_rounding); - in[3] = vec_adds(in[3], final_rounding); - in[4] = vec_adds(in[4], final_rounding); - in[5] = vec_adds(in[5], final_rounding); - in[6] = vec_adds(in[6], final_rounding); - in[7] = vec_adds(in[7], final_rounding); + in[0] = vec_add(in[0], final_rounding); + in[1] = vec_add(in[1], final_rounding); + in[2] = vec_add(in[2], final_rounding); + in[3] = vec_add(in[3], final_rounding); + in[4] = vec_add(in[4], final_rounding); + in[5] = vec_add(in[5], final_rounding); + in[6] = vec_add(in[6], final_rounding); + in[7] = vec_add(in[7], final_rounding); in[0] = vec_sra(in[0], five); in[1] = vec_sra(in[1], five); @@ -1380,8 +1380,8 @@ void vpx_idct8x8_12_add_altivec(const tran_low_t *input, uint8_t *dest, int stri tmp4 = vec_sra(tmp4, dct_bitshift_vec); tmp6 = vec_sra(tmp6, dct_bitshift_vec); - stp1_4 = vec_packs(tmp0, tmp2); - stp1_5 = vec_packs(tmp4, tmp6); + stp1_4 = vec_pack(tmp0, tmp2); + stp1_5 = vec_pack(tmp4, tmp6); } // Stage 2. @@ -1401,11 +1401,11 @@ void vpx_idct8x8_12_add_altivec(const tran_low_t *input, uint8_t *dest, int stri tmp4 = vec_sra(tmp4, dct_bitshift_vec); tmp6 = vec_sra(tmp6, dct_bitshift_vec); - in7 = vec_subs(stp1_4, stp1_5); + in7 = vec_sub(stp1_4, stp1_5); - stp2_0 = vec_packs(tmp0, tmp2); - stp2_2 = vec_packs(tmp6, tmp4); - stp2_4 = vec_adds(stp1_4, stp1_5); + stp2_0 = vec_pack(tmp0, tmp2); + stp2_2 = vec_pack(tmp6, tmp4); + stp2_4 = vec_add(stp1_4, stp1_5); stp2_5 = (vector signed short)vec_perm(in7, zero_s, merge64_hvec); stp2_6 = (vector signed short)vec_perm(in7, zero_s, merge64_lvec); } @@ -1414,8 +1414,8 @@ void vpx_idct8x8_12_add_altivec(const tran_low_t *input, uint8_t *dest, int stri { vector signed short lo_56 = vec_mergeh(stp2_5, stp2_6); - in4 = vec_adds(stp2_0, stp2_2); - in6 = vec_subs(stp2_0, stp2_2); + in4 = vec_add(stp2_0, stp2_2); + in6 = vec_sub(stp2_0, stp2_2); stp1_2 = (vector signed short)vec_perm(in6, in4, merge64_lvec); stp1_3 = (vector signed short)vec_perm(in6, in4, merge64_hvec); @@ -1428,27 +1428,27 @@ void vpx_idct8x8_12_add_altivec(const tran_low_t *input, uint8_t *dest, int stri tmp0 = vec_sra(tmp0, dct_bitshift_vec); tmp2 = vec_sra(tmp2, dct_bitshift_vec); - stp1_5 = vec_packs(tmp0, tmp2); + stp1_5 = vec_pack(tmp0, tmp2); } // Stage 4. - in0 = vec_adds(stp1_3, stp2_4); - in1 = vec_adds(stp1_2, stp1_5); - in2 = vec_subs(stp1_3, stp2_4); - in3 = vec_subs(stp1_2, stp1_5); + in0 = vec_add(stp1_3, stp2_4); + in1 = vec_add(stp1_2, stp1_5); + in2 = vec_sub(stp1_3, stp2_4); + in3 = vec_sub(stp1_2, stp1_5); TRANSPOSE_4X8_10(in0, in1, in2, in3, in0, in1, in2, in3); IDCT8(in0, in1, in2, in3, zero_s, zero_s, zero_s, zero_s, in0, in1, in2, in3, in4, in5, in6, in7); // Round, shift, and reconstitute as above. - in0 = vec_adds(in0, final_rounding); - in1 = vec_adds(in1, final_rounding); - in2 = vec_adds(in2, final_rounding); - in3 = vec_adds(in3, final_rounding); - in4 = vec_adds(in4, final_rounding); - in5 = vec_adds(in5, final_rounding); - in6 = vec_adds(in6, final_rounding); - in7 = vec_adds(in7, final_rounding); + in0 = vec_add(in0, final_rounding); + in1 = vec_add(in1, final_rounding); + in2 = vec_add(in2, final_rounding); + in3 = vec_add(in3, final_rounding); + in4 = vec_add(in4, final_rounding); + in5 = vec_add(in5, final_rounding); + in6 = vec_add(in6, final_rounding); + in7 = vec_add(in7, final_rounding); in0 = vec_sra(in0, five); in1 = vec_sra(in1, five); @@ -1591,8 +1591,8 @@ void vpx_idct8x8_12_add_altivec(const tran_low_t *input, uint8_t *dest, int stri tmp2 = vec_sra(tmp2, dct_bitshift_vec); \ tmp3 = vec_sra(tmp3, dct_bitshift_vec); \ \ - stp1_5 = vec_packs(tmp0, tmp1); \ - stp1_6 = vec_packs(tmp2, tmp3); \ + stp1_5 = vec_pack(tmp0, tmp1); \ + stp1_6 = vec_pack(tmp2, tmp3); \ \ stp1_8 = vec_add(stp1_8_0, stp1_11); \ stp1_9 = vec_add(stp2_9, stp2_10); \ @@ -1786,7 +1786,7 @@ void vpx_idct16x16_256_add_altivec(const tran_low_t *input, uint8_t *dest, for(j=0;j<16;j++) { // Final rounding and shift. - in[j] = vec_adds(in[j], final_rounding); + in[j] = vec_add(in[j], final_rounding); in[j] = vec_sra(in[j], six); // Reconstitute and store. @@ -1845,8 +1845,8 @@ static inline void array_transpose_4X8(vector signed short *in, vector signed sh tmp2 = vec_sra(tmp2, dct_bitshift_vec); \ tmp3 = vec_sra(tmp3, dct_bitshift_vec); \ \ - res0 = vec_packs(tmp0, tmp1); \ - res1 = vec_packs(tmp2, tmp3); \ + res0 = vec_pack(tmp0, tmp1); \ + res1 = vec_pack(tmp2, tmp3); \ } #define IDCT16_10 \ @@ -1917,8 +1917,8 @@ static inline void array_transpose_4X8(vector signed short *in, vector signed sh tmp2 = vec_sra(tmp2, dct_bitshift_vec); \ tmp3 = vec_sra(tmp3, dct_bitshift_vec); \ \ - stp1_5 = vec_packs(tmp0, tmp1); \ - stp1_6 = vec_packs(tmp2, tmp3); \ + stp1_5 = vec_pack(tmp0, tmp1); \ + stp1_6 = vec_pack(tmp2, tmp3); \ \ stp1_8 = vec_add(stp1_8_0, stp1_11); \ stp1_9 = vec_add(stp2_9, stp2_10); \ @@ -2014,8 +2014,8 @@ void vpx_idct16x16_10_add_altivec(const tran_low_t *input, uint8_t *dest, tmp5 = vec_sra(tmp5, dct_bitshift_vec); tmp7 = vec_sra(tmp7, dct_bitshift_vec); - stp2_8 = vec_packs(tmp0, tmp2); - stp2_11 = vec_packs(tmp5, tmp7); + stp2_8 = vec_pack(tmp0, tmp2); + stp2_11 = vec_pack(tmp5, tmp7); } // Stage 3. @@ -2030,7 +2030,7 @@ void vpx_idct16x16_10_add_altivec(const tran_low_t *input, uint8_t *dest, stp1_13 = vec_perm(stp2_11, zero, merge64_lvec); stp1_14 = vec_perm(stp2_8, zero, merge64_lvec); - stp1_4 = vec_packs(tmp0, tmp2); + stp1_4 = vec_pack(tmp0, tmp2); } // Stage 4. @@ -2053,10 +2053,10 @@ void vpx_idct16x16_10_add_altivec(const tran_low_t *input, uint8_t *dest, tmp5 = vec_sra(tmp5, dct_bitshift_vec); tmp7 = vec_sra(tmp7, dct_bitshift_vec); - stp1_0 = vec_packs(tmp0, tmp0); - stp1_1 = vec_packs(tmp2, tmp2); - stp2_9 = vec_packs(tmp1, tmp3); - stp2_10 = vec_packs(tmp5, tmp7); + stp1_0 = vec_pack(tmp0, tmp0); + stp1_1 = vec_pack(tmp2, tmp2); + stp2_9 = vec_pack(tmp1, tmp3); + stp2_10 = vec_pack(tmp5, tmp7); stp2_6 = vec_perm(stp1_4, zero, merge64_lvec); } @@ -2097,11 +2097,11 @@ void vpx_idct16x16_10_add_altivec(const tran_low_t *input, uint8_t *dest, tmp4 = vec_sra(tmp4, dct_bitshift_vec); tmp6 = vec_sra(tmp6, dct_bitshift_vec); - stp1_6 = vec_packs(tmp3, tmp1); - stp2_10 = vec_packs(tmp0, (vector signed int)zero); - stp2_13 = vec_packs(tmp2, (vector signed int)zero); - stp2_11 = vec_packs(tmp4, (vector signed int)zero); - stp2_12 = vec_packs(tmp6, (vector signed int)zero); + stp1_6 = vec_pack(tmp3, tmp1); + stp2_10 = vec_pack(tmp0, (vector signed int)zero); + stp2_13 = vec_pack(tmp2, (vector signed int)zero); + stp2_11 = vec_pack(tmp4, (vector signed int)zero); + stp2_12 = vec_pack(tmp6, (vector signed int)zero); smp0 = vec_add(stp1_0, stp1_4); smp1 = vec_sub(stp1_0, stp1_4); @@ -2161,7 +2161,7 @@ void vpx_idct16x16_10_add_altivec(const tran_low_t *input, uint8_t *dest, for(j=0;j<16;j++) { // Final rounding and shift. - in[j] = vec_adds(in[j], final_rounding); + in[j] = vec_add(in[j], final_rounding); in[j] = vec_sra(in[j], six); // Reconstitute and store. @@ -2342,8 +2342,8 @@ void vpx_idct16x16_10_add_altivec(const tran_low_t *input, uint8_t *dest, tmp2 = vec_sra(tmp2, dct_bitshift_vec); \ tmp3 = vec_sra(tmp3, dct_bitshift_vec); \ \ - stp1_5 = vec_packs(tmp0, tmp1); \ - stp1_6 = vec_packs(tmp2, tmp3); \ + stp1_5 = vec_pack(tmp0, tmp1); \ + stp1_6 = vec_pack(tmp2, tmp3); \ \ stp1_4 = stp2_4; \ stp1_7 = stp2_7; \ @@ -2611,7 +2611,7 @@ void vpx_idct32x32_34_add_altivec(const tran_low_t *input, uint8_t *dest, // Round, shift, reconstitute and store. for(j=0;j<32;++j) { - in[j] = vec_adds(in[j], final_rounding); + in[j] = vec_add(in[j], final_rounding); in[j] = vec_sra(in[j], six); _unaligned_load64(p0, (unsigned char *)(dest + j * stride)); @@ -2828,8 +2828,8 @@ void vpx_idct32x32_34_add_altivec(const tran_low_t *input, uint8_t *dest, tmp2 = vec_sra(tmp2, dct_bitshift_vec); \ tmp3 = vec_sra(tmp3, dct_bitshift_vec); \ \ - stp1_5 = vec_packs(tmp0, tmp1); \ - stp1_6 = vec_packs(tmp2, tmp3); \ + stp1_5 = vec_pack(tmp0, tmp1); \ + stp1_6 = vec_pack(tmp2, tmp3); \ \ stp1_4 = stp2_4; \ stp1_7 = stp2_7; \ @@ -3224,7 +3224,7 @@ void vpx_idct32x32_1024_add_altivec(const tran_low_t *input, uint8_t *dest, // Round, shift, reconstitute and store. for(j=0;j<32;++j) { - in[j] = vec_adds(in[j], final_rounding); + in[j] = vec_add(in[j], final_rounding); in[j] = vec_sra(in[j], six); _unaligned_load64(p0, (unsigned char *)(dest + j * stride)); @@ -3287,7 +3287,7 @@ static inline void write_buffer_8x16(uint8_t *dest, vector signed short *in, int // Round, shift, reconstitute and store, again. for(i=0;i<16;i++) { - in[i] = vec_adds(in[i], final_rounding); + in[i] = vec_add(in[i], final_rounding); in[i] = vec_sra(in[i], six); _unaligned_load64(p0, (unsigned char *)(dest + i * stride)); @@ -3491,22 +3491,22 @@ static void iadst16_8col(vector signed short *in) { w[30] = vec_sra(v[30], dct_bitshift_vec); w[31] = vec_sra(v[31], dct_bitshift_vec); - s[0] = vec_packs(w[0], w[1]); - s[1] = vec_packs(w[2], w[3]); - s[2] = vec_packs(w[4], w[5]); - s[3] = vec_packs(w[6], w[7]); - s[4] = vec_packs(w[8], w[9]); - s[5] = vec_packs(w[10], w[11]); - s[6] = vec_packs(w[12], w[13]); - s[7] = vec_packs(w[14], w[15]); - s[8] = vec_packs(w[16], w[17]); - s[9] = vec_packs(w[18], w[19]); - s[10] = vec_packs(w[20], w[21]); - s[11] = vec_packs(w[22], w[23]); - s[12] = vec_packs(w[24], w[25]); - s[13] = vec_packs(w[26], w[27]); - s[14] = vec_packs(w[28], w[29]); - s[15] = vec_packs(w[30], w[31]); + s[0] = vec_pack(w[0], w[1]); + s[1] = vec_pack(w[2], w[3]); + s[2] = vec_pack(w[4], w[5]); + s[3] = vec_pack(w[6], w[7]); + s[4] = vec_pack(w[8], w[9]); + s[5] = vec_pack(w[10], w[11]); + s[6] = vec_pack(w[12], w[13]); + s[7] = vec_pack(w[14], w[15]); + s[8] = vec_pack(w[16], w[17]); + s[9] = vec_pack(w[18], w[19]); + s[10] = vec_pack(w[20], w[21]); + s[11] = vec_pack(w[22], w[23]); + s[12] = vec_pack(w[24], w[25]); + s[13] = vec_pack(w[26], w[27]); + s[14] = vec_pack(w[28], w[29]); + s[15] = vec_pack(w[30], w[31]); // Stage 2. u[0] = vec_mergeh(s[8], s[9]); @@ -3595,14 +3595,14 @@ static void iadst16_8col(vector signed short *in) { x[6] = vec_sub(s[2], s[6]); x[7] = vec_sub(s[3], s[7]); - x[8] = vec_packs(w[0], w[1]); - x[9] = vec_packs(w[2], w[3]); - x[10] = vec_packs(w[4], w[5]); - x[11] = vec_packs(w[6], w[7]); - x[12] = vec_packs(w[8], w[9]); - x[13] = vec_packs(w[10], w[11]); - x[14] = vec_packs(w[12], w[13]); - x[15] = vec_packs(w[14], w[15]); + x[8] = vec_pack(w[0], w[1]); + x[9] = vec_pack(w[2], w[3]); + x[10] = vec_pack(w[4], w[5]); + x[11] = vec_pack(w[6], w[7]); + x[12] = vec_pack(w[8], w[9]); + x[13] = vec_pack(w[10], w[11]); + x[14] = vec_pack(w[12], w[13]); + x[15] = vec_pack(w[14], w[15]); // Stage 3. u[0] = vec_mergeh(x[4], x[5]); @@ -3687,20 +3687,20 @@ static void iadst16_8col(vector signed short *in) { s[2] = vec_sub(x[0], x[2]); s[3] = vec_sub(x[1], x[3]); - s[4] = vec_packs(v[0], v[1]); - s[5] = vec_packs(v[2], v[3]); - s[6] = vec_packs(v[4], v[5]); - s[7] = vec_packs(v[6], v[7]); + s[4] = vec_pack(v[0], v[1]); + s[5] = vec_pack(v[2], v[3]); + s[6] = vec_pack(v[4], v[5]); + s[7] = vec_pack(v[6], v[7]); s[8] = vec_add(x[8], x[10]); s[9] = vec_add(x[9], x[11]); s[10] = vec_sub(x[8], x[10]); s[11] = vec_sub(x[9], x[11]); - s[12] = vec_packs(v[8], v[9]); - s[13] = vec_packs(v[10], v[11]); - s[14] = vec_packs(v[12], v[13]); - s[15] = vec_packs(v[14], v[15]); + s[12] = vec_pack(v[8], v[9]); + s[13] = vec_pack(v[10], v[11]); + s[14] = vec_pack(v[12], v[13]); + s[15] = vec_pack(v[14], v[15]); // Stage 4. u[0] = vec_mergeh(s[2], s[3]); @@ -3767,14 +3767,14 @@ static void iadst16_8col(vector signed short *in) { in[1] = vec_sub(kZero, s[8]); in[2] = s[12]; in[3] = vec_sub(kZero, s[4]); - in[4] = vec_packs(v[4], v[5]); - in[5] = vec_packs(v[12], v[13]); - in[6] = vec_packs(v[8], v[9]); - in[7] = vec_packs(v[0], v[1]); - in[8] = vec_packs(v[2], v[3]); - in[9] = vec_packs(v[10], v[11]); - in[10] = vec_packs(v[14], v[15]); - in[11] = vec_packs(v[6], v[7]); + in[4] = vec_pack(v[4], v[5]); + in[5] = vec_pack(v[12], v[13]); + in[6] = vec_pack(v[8], v[9]); + in[7] = vec_pack(v[0], v[1]); + in[8] = vec_pack(v[2], v[3]); + in[9] = vec_pack(v[10], v[11]); + in[10] = vec_pack(v[14], v[15]); + in[11] = vec_pack(v[6], v[7]); in[12] = s[5]; in[13] = vec_sub(kZero, s[13]); in[14] = s[9]; @@ -3873,14 +3873,14 @@ static void idct16_8col(vector signed short *in) { w[14] = vec_sra(v[14], dct_bitshift_vec); w[15] = vec_sra(v[15], dct_bitshift_vec); - s[8] = vec_packs(w[0], w[1]); - s[15] = vec_packs(w[2], w[3]); - s[9] = vec_packs(w[4], w[5]); - s[14] = vec_packs(w[6], w[7]); - s[10] = vec_packs(w[8], w[9]); - s[13] = vec_packs(w[10], w[11]); - s[11] = vec_packs(w[12], w[13]); - s[12] = vec_packs(w[14], w[15]); + s[8] = vec_pack(w[0], w[1]); + s[15] = vec_pack(w[2], w[3]); + s[9] = vec_pack(w[4], w[5]); + s[14] = vec_pack(w[6], w[7]); + s[10] = vec_pack(w[8], w[9]); + s[13] = vec_pack(w[10], w[11]); + s[11] = vec_pack(w[12], w[13]); + s[12] = vec_pack(w[14], w[15]); // Stage 3. t[0] = s[0]; @@ -3910,10 +3910,10 @@ static void idct16_8col(vector signed short *in) { v[6] = vec_sra(v[6], dct_bitshift_vec); v[7] = vec_sra(v[7], dct_bitshift_vec); - t[4] = vec_packs(v[0], v[1]); - t[7] = vec_packs(v[2], v[3]); - t[5] = vec_packs(v[4], v[5]); - t[6] = vec_packs(v[6], v[7]); + t[4] = vec_pack(v[0], v[1]); + t[7] = vec_pack(v[2], v[3]); + t[5] = vec_pack(v[4], v[5]); + t[6] = vec_pack(v[6], v[7]); t[8] = vec_add(s[8], s[9]); t[9] = vec_sub(s[8], s[9]); @@ -3968,20 +3968,20 @@ static void idct16_8col(vector signed short *in) { w[14] = vec_sra(v[14], dct_bitshift_vec); w[15] = vec_sra(v[15], dct_bitshift_vec); - s[0] = vec_packs(w[0], w[1]); - s[1] = vec_packs(w[2], w[3]); - s[2] = vec_packs(w[4], w[5]); - s[3] = vec_packs(w[6], w[7]); + s[0] = vec_pack(w[0], w[1]); + s[1] = vec_pack(w[2], w[3]); + s[2] = vec_pack(w[4], w[5]); + s[3] = vec_pack(w[6], w[7]); s[4] = vec_add(t[4], t[5]); s[5] = vec_sub(t[4], t[5]); s[6] = vec_sub(t[7], t[6]); s[7] = vec_add(t[6], t[7]); s[8] = t[8]; s[15] = t[15]; - s[9] = vec_packs(w[8], w[9]); - s[14] = vec_packs(w[10], w[11]); - s[10] = vec_packs(w[12], w[13]); - s[13] = vec_packs(w[14], w[15]); + s[9] = vec_pack(w[8], w[9]); + s[14] = vec_pack(w[10], w[11]); + s[10] = vec_pack(w[12], w[13]); + s[13] = vec_pack(w[14], w[15]); s[11] = t[11]; s[12] = t[12]; @@ -4003,8 +4003,8 @@ static void idct16_8col(vector signed short *in) { w[1] = vec_sra(v[1], dct_bitshift_vec); w[2] = vec_sra(v[2], dct_bitshift_vec); w[3] = vec_sra(v[3], dct_bitshift_vec); - t[5] = vec_packs(w[0], w[1]); - t[6] = vec_packs(w[2], w[3]); + t[5] = vec_pack(w[0], w[1]); + t[6] = vec_pack(w[2], w[3]); t[8] = vec_add(s[8], s[11]); t[9] = vec_add(s[9], s[10]); @@ -4050,10 +4050,10 @@ static void idct16_8col(vector signed short *in) { w[6] = vec_sra(v[6], dct_bitshift_vec); w[7] = vec_sra(v[7], dct_bitshift_vec); - s[10] = vec_packs(w[0], w[1]); - s[13] = vec_packs(w[2], w[3]); - s[11] = vec_packs(w[4], w[5]); - s[12] = vec_packs(w[6], w[7]); + s[10] = vec_pack(w[0], w[1]); + s[13] = vec_pack(w[2], w[3]); + s[11] = vec_pack(w[4], w[5]); + s[12] = vec_pack(w[6], w[7]); s[14] = t[14]; s[15] = t[15]; -- 2.43.0